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september 2013 doc id 7393 rev 9 1/31 1 vnb14nv04, vnd14nv04 vnd14nv04-1, vns14nv04 "omnifet ii" fully autoprotected power mosfet features linear current limitation thermal shutdown short circuit protection integrated clamp low current drawn from input pin diagnostic feedback through input pin esd protection direct access to the gate of the power mosfet (analog driving) compatible with standard power mosfet description the vnb14nv04, vnd14nv04, vnd14nv04-1 and vns14nv04 are monolithic devices made using stmicroelectronics vipower? m0 technology, intended for replacement of standard power mosfets in dc to 50 khz applications. built-in thermal shutdown, linear current limitation and overvoltage clamp protect the chip in harsh environments. fault feedback can be detected by monitoring the voltage at the input pin. type r ds(on) i lim v clamp vnb14nv04 vnd14nv04 vnd14nv04-1 vns14nv04 35 m 12 a 40 v 1 3 3 2 1 1 3 to-252 (dpak) to-251 (ipak) so-8 d 2 pak table 1. device summary package tube tube (lead free) tape and reel tape and reel (lead free) d 2 pak vnb14nv04 vnb14nv04-e vnb14nv0413tr vnb14nv04tr-e to-252 (dpak) vnd14nv04 vnd14nv04-e vnd14nv0413tr vnd14nv04tr-e to-251 (ipak) vnd14nv04-1 vnd14nv04-1-e - - so-8 vns14nv04 - - - www.st.com
contents vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 2/31 doc id 7393 rev 9 contents 1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 package thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.1 dpak thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.2 so-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.3 d 2 pak thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.1 ecopack ? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.2 to-251 (ipak) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.3 d 2 pak mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.4 to-252 (dpak) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.5 so-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 list of tables doc id 7393 rev 9 3/31 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 4. electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 5. dpak thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 6. d 2 pak thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 7. to-251 (ipak) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 8. d 2 pak mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 table 9. to-252 (dpak) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 table 10. so-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 11. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
list of figures vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 4/31 doc id 7393 rev 9 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 4. test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 5. unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 6. unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 7. input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 8. source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 9. static drain source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 10. derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 11. static drain-source on resistance vs. input voltage (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . 12 figure 12. static drain-source on resistance vs. input voltage (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . 12 figure 13. transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 14. static drain-source on resistance vs. id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 15. transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 16. turn-on current slope (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 17. turn-on current slope (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 18. input voltage vs. input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 19. turn-off drain source voltage slope (part 1/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 figure 20. turn-off drain source voltage slope (part 2/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 figure 21. capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 22. switching time resistive load (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 23. switching time resistive load (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 24. output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 25. normalized on resistance vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 26. normalized input threshold voltage vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 27. current limit vs. junction temperatures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 28. step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 29. dpak maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 30. dpak demagnetization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 31. d 2 pak maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 32. d 2 pak demagnetization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 33. dpak pc board (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 34. dpak r thj-amb vs pcb copper area in open box free air condition. . . . . . . . . . . . . . . . . . . 18 figure 35. dpak thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 36. thermal fitting model of an omnifet ii in dpak. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 37. so-8 pc board (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 38. so-8 r thj-amb vs pcb copper area in open box free air condition . . . . . . . . . . . . . . . . . . . 20 figure 39. d 2 pak pc board (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 40. d 2 pak r thj-amb vs pcb copper area in open box free air condition . . . . . . . . . . . . . . . . . . 21 figure 41. d 2 pak thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 42. thermal fitting model of an omnifet ii in d 2 pak . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 43. to-251 (ipak) package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 figure 44. d 2 pak package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 45. to-252 (dpak) package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 46. so-8 package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 block diagram doc id 7393 rev 9 5/31 1 block diagram figure 1. block diagram
electrical specification vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 6/31 doc id 7393 rev 9 2 electrical specification figure 2. current and voltage conventions 2.1 absolute maximum rating table 2. absolute maximum rating symbol parameter value unit so-8 dpak ipak d 2 pak v ds drain-source voltage (v in =0 v) internally clamped v v in input voltage internally clamped v i in input current +/-20 ma r in min minimum input series impedance 10 i d drain current internally limited a i r reverse dc output current -15 a v esd1 electrostatic discharge (r=1.5 k , c=100 pf) 4000 v v esd2 electrostatic discharge on output pin only (r=330 , c=150 pf) 16500 v p tot total dissipation at t c =25 c 4.6 74 74 74 w e max maximum switching energy (l=0.4 mh; r l =0 ; v bat =13.5 v; t jstart =150 c; i l =18 a) 93 93 mj t j operating junction temperature internally limited c t c case operating temperature internally limited c t stg storage temperature -55 to 150 c
vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 electrical specification doc id 7393 rev 9 7/31 2.2 thermal data 2.3 electrical characteristics -40 < tj < 150 c unless otherwise specified. table 3. thermal data symbol parameter value unit so-8 dpak ipak d 2 pak r thj-case thermal resistance junction-case max 1.7 1.7 1.7 c/w r thj-lead thermal resistance junction-lead max 27 c/w r thj-amb thermal resistance junction-ambient max 90 (1) 65 (1) 102 52 (1) c/w 1. when mounted on a standard single-sided fr4 board with 0.5 cm 2 of cu (at least 35 m thick) connected to all drain pins. horizontal mounting and no artificial air flow. table 4. electrical characteristics symbol parameter test conditions min typ max unit off v clamp drain-source clamp voltage v in =0 v; i d =7 a 40 45 55 v v clth drain-source clamp threshold voltage v in =0 v; i d =2 ma 36 v v inth input threshold voltage v ds =v in ; i d =1 ma 0.5 2.5 v i iss supply current from input pin v ds =0 v; v in =5 v 100 150 a v incl input-source clamp voltage i in =1 ma i in =-1 ma 6 -1.0 6.8 8 -0.3 v i dss zero input voltage drain current (v in =0 v) v ds =13 v; v in =0 v; t j =25 c v ds =25 v; v in =0 v 30 75 a on r ds(on) static drain-source on resistance v in = 5 v i d = 7 a t j = 25 c v in = 5 v i d = 7 a 35 70 m dynamic (tj=25c, unless otherwise specified) g fs (1) forward transconductance v dd = 13 v i d = 7 a 18 s c oss output capacitance v ds = 13 v f = 1 mhz v in = 0 v 400 pf switching t d(on) turn-on delay time v dd = 15 v i d = 7 a v gen = 5 v r gen = r in min =10 (see figure 3 ) 80 250 ns t r rise time 350 1000 ns t d(off) turn-off delay time 450 1350 ns t f fall time 150 500 ns
electrical specification vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 8/31 doc id 7393 rev 9 t d(on) turn-on delay time v dd = 15 v i d = 7 a v gen = 5 v r gen = 2.2 k (see figure 3 ) 1.5 4.5 s t r rise time 9.7 30.0 s t d(off) turn-off delay time 25.0 s t f fall time 10.2 30.0 s (di/dt) on turn-on current slope v dd = 15 v i d = 7 a v gen = 5 v r gen = r in min =10 16 a/s q i total input charge v dd = 12 v i d = 7 a v in = 5 v; i gen = 2.13 ma (see figure 7 ) 36.8 nc source drain diode v sd (1) forward on voltage i sd = 7 a v in = 0 v 0.8 v t rr reverse recovery time i sd = 7 a; di/dt = 40 a/s v dd = 30 v l = 200 h (see test circuit, figure 4 ) 300 ns q rr reverse recovery charge 0.8 c i rrm reverse recovery current 5 a protection i lim drain current limit v in = 5 v; v ds = 13 v 12 18 24 a t dlim step response current limit v in = 5 v; v ds = 13 v 45 s t jsh over temperature shutdown 150 175 200 c t jrs over temperature reset 135 c i gf fault sink current v in = 5 v; v ds = 13 v; t j = t jsh 10 15 20 ma e as single pulse avalanche energy starting t j = 25 c; v dd = 24 v v in = 5 v; r gen = r in min = 10 ; l = 24 mh (see figure 5 and figure 6 ) 400 mj 1. pulsed: pulse duration = 300 s, duty cycle 1.5 % table 4. electrical characteristics (continued) symbol parameter test conditions min typ max unit
vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 protection features doc id 7393 rev 9 9/31 3 protection features during normal operation, the input pin is electrically connected to the gate of the internal power mosfet through a low impedance path. the device then behaves like a standard power mosfet and can be used as a switch from dc up to 50 khz. the only difference from the user?s standpoint is that a small dc current i iss (typ. 100 a) flows into the input pin in order to supply the internal circuitry. the device integrates: overvoltage clamp protection: internally set at 45 v, along with the rugged avalanche characteristics of the power mosfet stage give this device unrivalled ruggedness and energy handling capability. this feature is mainly important when driving inductive loads. linear current limiter circuit: limits the drain current i d to i lim whatever the input pin voltages. when the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the over temperature threshold t jsh . over temperature and short circuit protection: these are based on sensing the chip temperature and are not dependent on the input voltage. the location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. over temperature cutout occurs in the range 150 to 190 c, a typical value being 170 c. the device is automatically restarted when the chip temperature falls of about 15 c below shutdown temperature. status feedback: in the case of an over temperature fault condition (t j > t jsh ), the device tries to sink a diagnostic current igf through the input pin in order to indicate fault condition. if driven from a low impedance source, this current may be used in order to warn the control circuit of a device shutdown. if the drive impedance is high enough so that the input pin driver is not able to supply the current i gf , the input pin will fall to 0 v. this will not however affect the device operation: no requirement is put on the current capability of the input pin driver except to be able to supply the normal operation drive current i iss . additional features of this device are esd protection according to the human body model and the ability to be driven from a ttl logic circuit.
protection features vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 10/31 doc id 7393 rev 9 figure 3. switching time test circuit for resistive load figure 4. test circuit for diode recovery times
vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 protection features doc id 7393 rev 9 11/31 figure 5. unclamped inductive load test circuits figure 6. unclamped inductive waveforms figure 7. input charge test circuit
protection features vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 12/31 doc id 7393 rev 9 figure 8. source-drain diode forward characteristics figure 9. static drain source on resistance figure 10. derating curve figure 11. static drain-source on resistance vs. input voltage (part 1/2) figure 12. static drain-source on resistance vs. input voltage (part 2/2) figure 13. transconductance
vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 protection features doc id 7393 rev 9 13/31 figure 14. static drain-source on resistance vs. id figure 15. transfer characteristics figure 16. turn-on current slope (part 1/2) figure 17. turn-on current slope (part 2/2) figure 18. input voltage vs. input charge figure 19. turn-off drain source voltage slope (part 1/2)
protection features vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 14/31 doc id 7393 rev 9 figure 20. turn-off drain source voltage slope (part 2/2) figure 21. capacitance variations figure 22. switching time resistive load (part 1/2) figure 23. switching time resistive load (part 2/2) figure 24. output characteristics figure 25. normalized on resistance vs. temperature
vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 protection features doc id 7393 rev 9 15/31 figure 26. normalized input threshold voltage vs. temperature figure 27. current limit vs. junction temperatures figure 28. step response current limit
protection features vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 16/31 doc id 7393 rev 9 figure 29. dpak maximum turn-off current versus load inductance legend: a= single pulse at t jstart =150oc b= repetitive pulse at t jstart =100oc c= repetitive pulse at t jstart =125oc conditions: v cc =13.5 v values are generated with r l =0 in case of repetitive pulses, t jstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves b and c. figure 30. dpak demagnetization
vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 protection features doc id 7393 rev 9 17/31 figure 31. d 2 pak maximum turn-off current versus load inductance legend: a= single pulse at t jstart =150oc b= repetitive pulse at t jstart =100oc c= repetitive pulse at t jstart =125oc conditions: v cc =13.5 v values are generated with r l =0 in case of repetitive pulses, t jstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves b and c. figure 32. d 2 pak demagnetization
package thermal data vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 18/31 doc id 7393 rev 9 4 package thermal data 4.1 dpak thermal data figure 33. dpak pc board (1) 1. layout condition of r th and z th measurements (pcb fr4 area = 60 mm x 60 mm, pcb thickness=2 mm, cu thickness=35 m, copper areas: from minimum pad lay-out to 8 cm 2 ). figure 34. dpak r thj-amb vs pcb copper area in open box free air condition
vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 package thermal data doc id 7393 rev 9 19/31 figure 35. dpak thermal impedanc e junction ambient single pulse figure 36. thermal fitting model of an omnifet ii in dpak pulse calculation formula where table 5. dpak thermal parameter area/island(cm 2 ) footprint 6 r1 (c/w) 0.1 r2 (c/w) 0.35 r3 ( c/w) 1.20 r4 (c/w) 2 r5 (c/w) 15 r6 (c/w) 61 24 c1 (w.s/c) 0.0006 c2 (w.s/c) 0.0021 c3 (w.s/c) 0.05 z th r th ? z thtp 1 ? () + = t p t ? =
package thermal data vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 20/31 doc id 7393 rev 9 4.2 so-8 thermal data figure 37. so-8 pc board (1) 1. layout condition of r th and z th measurements (pcb fr4 area = 58 mm x 58 mm, pcb thickness=2 mm, cu thickness=35 m, copper areas: 0.14 cm 2 , 0.6 cm 2 , 1.6 cm 2 ). figure 38. so-8 r thj-amb vs pcb copper area in open box free air condition c4 (w.s/c) 0.3 c5 (w.s/c) 0.45 c6 (w.s/c) 0.8 5 table 5. dpak thermal parameter (continued) area/island(cm 2 ) footprint 6
vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 package thermal data doc id 7393 rev 9 21/31 4.3 d 2 pak thermal data figure 39. d 2 pak pc board (1) 1. layout condition of r th and z th measurements (pcb fr4 area = 60 mm x 60 mm, pcb thickness=2 mm, cu thickness=35 m, copper areas: from minimum pad lay-out to 8 cm 2 ). figure 40. d 2 pak r thj-amb vs pcb copper area in open box free air condition
package thermal data vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 22/31 doc id 7393 rev 9 figure 41. d 2 pak thermal impedance junction ambient single pulse figure 42. thermal fitting model of an omnifet ii in d 2 pak pulse calculation formula where table 6. d 2 pak thermal parameter area/island(cm 2 ) footprint 6 r1 (c/w) 0.1 r2 (c/w) 0.35 r3 ( c/w) 0.3 r4 (c/w) 4 r5 (c/w) 9 r6 (c/w) 37 22 c1 (w.s/c) 0.0006 c2 (w.s/c) 2.10e-03 z th r th ? z thtp 1 ? () + = t p t ? =
vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 package thermal data doc id 7393 rev 9 23/31 c3 (w.s/c) 8.00e-02 c4 (w.s/c) 0.45 c5 (w.s/c) 2 c6 (w.s/c) 3 5 table 6. d 2 pak thermal parameter (continued) area/island(cm 2 ) footprint 6
package information vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 24/31 doc id 7393 rev 9 5 package information 5.1 ecopack ? in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 5.2 to-251 (ipak) mechanical data figure 43. to-251 (ipak) package dimension table 7. to-251 (ipak) mechanical data dim. millimeters min. typ. max. a2.2 2.4 a1 0.9 1.1 a3 0.7 1.3 b 0.64 0.9 b2 5.2 5.4
vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 package information doc id 7393 rev 9 25/31 5.3 d 2 pak mechanical data figure 44. d 2 pak package dimension b3 0.85 b5 0.3 b6 0.95 c 0.45 0.6 c2 0.48 0.6 d6 6.2 e6.4 6.6 g4.4 4.6 h15.9 16.3 l9 9.4 l1 0.8 1.2 l2 0.8 1 table 7. to-251 (ipak) mechanical data (continued) dim. millimeters min. typ. max.
package information vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 26/31 doc id 7393 rev 9 table 8. d 2 pak mechanical data dim. millimeters min. typ. max. a4.4 4.6 a1 2.49 2.69 a2 0.03 0.23 b 0.7 0.93 b2 1.14 1.7 c 0.45 0.6 c2 1.23 1.36 d8.95 9.35 d1 8 e10 10.4 e1 8.5 g4.88 5.28 l15 15.85 l2 1.27 1.4 l3 1.4 1.75 m2.4 3.2 r0.4 v2 0 8
vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 package information doc id 7393 rev 9 27/31 5.4 to-252 (dpak) mechanical data figure 45. to-252 (dpak) package dimension table 9. to-252 (dpak) mechanical data dim. millimeters min. typ. max. a2.20 2.40 a1 0.90 1.10 a2 0.03 0.23 b0.64 0.90 b2 5.20 5.40 c 0.45 0.6 c2 0.48 0.6 d 6 6.20 d1 5.1 e6.4 6.6 e1 4.7 e2.28 g4.4 4.6 h9.35 10.1 l2 0.8
package information vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 28/31 doc id 7393 rev 9 5.5 so-8 mechanical data figure 46. so-8 package dimension l4 0.6 1 r0.2 v2 0 8 package weight gr. 0.29 table 9. to-252 (dpak) mechanical data (continued) dim. millimeters min. typ. max. table 10. so-8 mechanical data dim. millimeters min. typ. max. a1.75 2.40 a1 0.25 0.1 a2 1.65 b0.85 0.35 b1 0.25 0.19
vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 package information doc id 7393 rev 9 29/31 c 0.5 0.25 c1 45 d5 4.8 e6.2 5.8 e1.27 e3 3.81 f4 3.8 l 1.27 0.4 m0.6 f 8 table 10. so-8 mechanical data (continued) dim. millimeters min. typ. max.
revision history vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 30/31 doc id 7393 rev 9 6 revision history table 11. document revision history date revision changes 21-jun-2004 6 initial release. 03-apr-2009 7 document reformatted. added table 1: device summary on page 1 . updated section 5: package information on page 24 06-apr-2010 8 added part number vns14nv04. added so-8 package: ? updated table 1: device summary ? updated table 2: absolute maximum rating ? updated table 3: thermal data ? updated chapter 4: package thermal data ? updated chapter 5: package information 20-sep-2013 9 updated disclaimer.
vnb14nv04, vnd14nv04, vnd14nv04-1, vns14nv04 doc id 7393 rev 9 31/31 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a particular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems with product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statem ents and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or register ed trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2013 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - swed en - switzerland - united kingdom - united states of america www.st.com

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